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VULNERABILITIES

CVE-2026-23554 Details

Description

The Intel EPT paging code uses an optimization to defer flushing of any cached EPT state until the p2m lock is dropped, so that multiple modifications done under the same locked region only issue a single flush. Freeing of paging structures however is not deferred until the flushing is done, and can result in freed pages transiently being present in cached state. Such stale entries can point to memory ranges not owned by the guest, thus allowing access to unintended memory regions.

Metrics

CVSS 3.x Severity and Vector Strings:

References to Advisories, Solutions, and Tools

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Weakness Enumeration

CWE-IDCWE NameSource
CWE-367Time-of-check Time-of-use (TOCTOU) Race ConditionCISA-ADP

Affected Products

ProductVersions
xen xen
>= 4.17

CPE

  • cpe:2.3:o:xen:xen:*:*:*:*:*:*:x86:*

Remediation

  • No remediation found in references.

Change History

6 change records found show changes


QUICK INFO

CVE Dictionary Entry:
CVE-2026-23554
NVD Published Date:
Mar 23, 2026
NVD Last Modified:
Jun 17, 2026
Source:
[email protected]
CVE-2026-23554 Details - Not Deferred